367 research outputs found

    A Capacitively loaded Antenna for use in Mobile Handsets

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    YesA tuneable slotted patch antenna design is presented and verified for use in the DCS, PCS and UMTS bands. The tuning circuit consists of two varactor diodes with some passive components, and is integrated fully with the r radiator patch, with the varactors occupying different locations over the slot. The tuning does not require any further modification to the patch or feed geometry. Good agreement is observed between the predicted and observed impedance bandwidth, return loss, gain and radiation pattern, throughout the range 1.70 GHz-2.05 GHz

    High-performance 50μm silicon-based on-chip antenna with high port-to-port isolation implemented by metamaterial and SIW concepts for THz integrated systems

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    A novel 50μm Silicon-based on-chip antenna is presented that combines metamaterial (MTM) and substrate integrated waveguide (SIW) technologies for integration in THz circuits operating from 0.28 to 0.30 THz. The antenna structure comprises a square patch antenna implemented on a Silicon substrate with a ground-plane. Embedded diagonally in the patch are two T-shaped slots and the edges of the patch is short-circuited to the ground-plane with metal vias, which convert the structure into a substrate integrated waveguide. This structure reduces loss resulting from surface waves and Silicon dielectric substrate. The modes in the structure can be excited through two coaxial ports connected to the patch from the underside of the Silicon substrate. The proposed antenna structure is essentially transformed to exhibit metamaterial properties by realizing two T-shaped slots, which enlarges the effective aperture area of the miniature antenna and significantly enhances its impedance bandwidth and radiation characteristics between 0.28 THz to 0.3 THz. It has an average gain and efficiency of 4.5dBi and 65%, respectively. In addition, it is a self-isolated structure with high isolation of better than 30dB between the two ports. The on-chip antenna has dimensions of 800x800x60μm3This work is partially supported by innovation programme under grant agreement H2020 -MSCA-ITN-2016 SECRET 722424 and the financial support from the UK Engineering and Physical Sciences Research Council (EPSRC) under grant EP/EO/22936/1

    Silicon-based 0.450-0.475 THz series-fed double dielectric resonator on-chip antenna array based on metamaterial properties for integrated-circuits

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    The antenna array designed to operate over 0.450-0.475 Terahertz comprises two dielectric resonators (DRs) that are stacked vertically on top of each other and placed on the surface of the slot antenna fabricated on a silicon substrate using standard CMOS technology. The slot created in the silicon substrate is meandering and is surrounded by metallic via-wall to prevent energy dissipation. The antenna has a maximum gain of 4.5dBi and radiation efficiency of 45.7% at 0.4625 THz. The combination of slot and vias transform the antenna to a metamaterial structure that provides a relatively small antenna footprint. The proposed series-fed double DRs on-chip antenna array is useful for applications in THz integrated circuits.This work is partially supported by innovation programme under grant agreement H2020-MSCA-ITN-2016 SECRET-722424 and the financial support from the UK Engineering and Physical Sciences Research Council (EPSRC) under grant EP/E0/22936/1
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